Art
J-GLOBAL ID:202002256638363210   Reference number:20A0418846

Translinear Principle Based CMOS Current Multiplier Using Level-Shift Circuits and its Application

トランスリニア原理によるレベルシフト回路を用いたCMOS電流乗算器とその応用
Author (3):
Material:
Issue: ECT-20-001-026 電子回路研究会  Page: 81-86  Publication year: Jan. 23, 2020 
JST Material Number: Z0924B  Document type: Proceedings
Article type: 原著論文  Country of issue: Japan (JPN)  Language: JAPANESE (JA)
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Semi thesaurus term:
Thesaurus term/Semi thesaurus term
Keywords indexed to the article.
All keywords is available on JDreamIII(charged).
On J-GLOBAL, this item will be available after more than half a year after the record posted. In addtion, medical articles require to login to MyJ-GLOBAL.

JST classification (2):
JST classification
Category name(code) classified by JST.
Amplification circuits  ,  Semiconductor integrated circuit 
Reference (4):
  • C. Toumazou; Analogue Ic Design: The Current-Mode Approach, Peter Peregrinus Ltd; Repr. with minor corrections June 1990 edition (June 1, 1990)
  • Nobuo Fujii; Keitaro,, Sekine; Shigetaka Takagi; Akira Hyogo: Denshi kairo handobukku, Tokyo-to Shinjuku-ku: Asakura Shoten, 2006. (30 Jun. 2006) 藤井信生・関根 慶太郎・高木 茂孝・兵庫 明 : 『電子回路ハンドブック』, 朝倉書店 (2006/7/1)
  • Y. Dong; S. Bagga; W.A. Serdijn; “An inherently linear CMOS multiplier”, In Proc. Workshop on Wireless Circuits and Systems (WoWCAS), Vancouver, Canada, pp. 53-54, May 21-22 2004.
  • Shigetaka Takagi: EE Text Anarogu Denchi Kairo, Tokyo: Ohmsha, Ltd. (25 Oct. 2011) 髙木茂孝 : 『EE Textアナログ電子回路』, オーム社 (2011/10/25)

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