Rchr
J-GLOBAL ID:200901026220439000
Update date: Dec. 18, 2024
NOBUO FUJII
フジイ ノブオ | NOBUO FUJII
Research theme for competitive and other funds (7):
Analog Integrated Circuits
High Frequency Analog Circuits
CAD of Analog Integrated Circuits
アナログ集積回路,集積化フィルタ,高周波アナログ回路
高周波アナログ回路
アナログ信号処理
アナログ集積回路の計算機援用設計
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MISC (208):
佐藤隆英, 高木茂孝, 藤井信生. アクティブインダクタの対称構成による低消費電力化. 電気学会論文誌C. 2009. 129. 8. 1534-1540
Takahide Sato, Isamu Matsumoto, Shigetaka Takagi, Nobuo Fujii. Design of low power track and hold circuit based on two stage structure. IEICE TRANSACTIONS ON ELECTRONICS. 2008. E91C. 6. 894-902
Retdian A. Nicodimus, Shigetaka Takagi, Nobuo Fujii. Reduction of bootstrapped switch area consumption using pre-charge phase. IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES. 2008. E91A. 2. 476-482
Shigetaka Takagi, Retdian Agung Nicodimus, Kazuyuki Wada, Takahide Sato, Nobuo Fujii. Multi-path analog circuits robust to digital substrate noise. IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES. 2008. E91A. 2. 535-541
Shinpei Sakoda, Shigetaka Takagi, Nobuo Fujii. Psuedo Exponential Function Generator Based on Square Current Circuits. 2008. J91-A. 4. 468-475
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Books (9):
ハンディブック電子
オーム社 2006
電子回路ハンドブック
朝倉書店 2006
アナログ電子回路の基礎
昭晃堂 2004
なっとくするディジタル電子回路
講談社 1997
電気回路
オーム社 1994
more...
Lectures and oral presentations (149):
制御電流に対して発振周波数が直線的に変化する四相出力発振回路の測定結果と位相誤差の検討
(電子回路研究会 2009)
Area-Efficient Phase-Locked Loop using Double-Edge-Triggered Phase-Frequency Detector
(2008)
Novel DC Offset Cancellation in Direct Conversion Receivers
(2008 3rd Interantional Sympsium on Communication, Control and Signal Procesing 2008)
Multi-Path Filters Robust to Substrate Noise and Nonlinearity
(2008)
Design of 4th order low pass filters using a source follower
(2008)
more...
Works (4):
次世代アナログ回路の研究
2004 - 2007
低電圧,高速アナログ集積回路設計技術に関する研究
2002 - 2004
Design of wide-dynamic range and low power supply votage analog integrated circuits
1999 - 2002
広いダイナミックレンジを有する低電源電圧アナログ集積回路設計技術に関する研究
1999 - 2002
Education (3):
- 1971 Tokyo Institute of Technology Graduate School, Division of Science and Engineering
- 1971 Tokyo Institute of Technology Science of Engineering
- 1966 Keio University
Professional career (2):
Doctor of Engineering
Master of Engineering
Work history (1):
Tokyo Institute of Technology International Office Institute Professor
Committee career (3):
2000 - 2002 IEEE Vice President of Region 10 、Member of Exective Committee 、Member of Board of Governors ・・・
2000 - 2002 IEEE Vice President of Region 10 、Member of Exective Committee 、Member of Board of Governors ・・・
1997 - 1997 電子情報通信学会 基礎境界ソサイエティ会長、理事 、基礎境界ソサイエティ副会長
Awards (14):
2006 - IEICE Science Promotion Award
2003 - 電気学会部門特別貢献賞
2003 - Tokyo Tech Award for the Best Teacher
2002 - IEICE Fellow
2002 - IEEE Fellow
2001 - IEICE Best Paper Award
2001 - 2001 IEEJ International Analog VLSI Workshop Best Paper Award
2000 - 2000 IEEJ International Analog VLSI Workshop Best Paper Award
2000 - IEICE Best Paper Award
1999 - IEICE Best Paper Award
1998 - 1998 IEEE APCCAS Best Paper Award
1996 - IEICE Best Paper Award
1982 - 電子通信学会論文賞
1980 - IEICE Science Promotion Award
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Association Membership(s) (8):
Engineers
, Information and communication
, Institute of Electronics
, Insitute of Electrical Engineers of Japan
, IEEE
, 電子情報通信学会
, 電気学会
, IEEE
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