Rchr
J-GLOBAL ID：200901063468217759   Update date: Jan. 30, 2024

Iwasaki Kazuhiko

イワサキ カズヒコ | Iwasaki Kazuhiko
Affiliation and department：
東京都立大学

About 東京都立大学


Other affiliations (1)：
  • Tokyo Metropolitan University/Graduate School of System Design
Research field  (2)： Electronic devices and equipment ,  Computer systems
Research keywords  (4)： Dependable Networking ,  情報通信工学 ,  計算機科学 ,  VLSI Testing
Research theme for competitive and other funds  (8)：
  • 2011 - 2013 Highly Accurate Devect Level Estimation of SOC Chips Based on Its Layouts
  • 2006 - 2008 A Basic Study on SoC Base Dependable Processor with Self-healing Mechanism for Faults
  • 2003 - 2005 Studies on Dependable Distributed Storage Cluster for SoC Design System using SAN/NAS
  • 1997 - 1999 Non-Stop Metropolitan Area Network
  • 1995 - 1996 Fault-Tolerant Designs for Multimedia Networks.
Show all
Papers (17)：
ｍore...
MISC (5)：
  • Tabito Suzuki, Mamoru Ohara, Masayuki Arai, Satoshi Fukumoto, Kazuhiko Iwasaki. Analysis of Probabilistic Trapezoid Protocol for Data Replication. 2008. 49. 6. 2092-2105
  • ARAI Masayuki, FUKUMOTO Satoshi, IWASAKI Kazuhiko. Reliability Analysis of a Convolutional-Code-Based Packet Level FEC under Limited Buffer Size(Reliability, Maintainability and Safety Analysis). IEICE transactions on fundamentals of electronics, communications and computer sciences. 2005. 88. 4. 1047-1054
  • Arai Masayuki, Kurosu Hitoshi, Fukumoto Satoshi, Iwasaki Kazuhiko, Tsuchiya Toshio, Yamada Kazunori, Youn Hee Yong. C-24 Implementation and Experiments on Dependable Video Conference System. 2002. 2002. 1. 235-236
  • YAMAGUCHI Anna, ARAI Masayuki, FUKUMOTO Satoshi, IWASAKI Kazuhiko. Analytical Evaluation of Internet Packet Loss Recovery Using Convolutional Codes. IEICE Trans. Inf. &Syst. 2002. 85. 5. 854-863
  • YAMAGUCHI Anna, ARAI Masayuki, KUROSU Hitoshi, FUKUMOTO Satoshi, IWASAKI Kazuhiko. Fault-Tolerance Design for Multicast Using Convolutional-Code-Based FEC and Its Analytical Evaluation. IEICE Trans. Inf. & Syst. 2002. 85. 5. 864-873
Books (2)：
  • Computer Architecture, 2nd Edition (in Japanese)
    Asakura 2015
  • Network System Structure (in Japanese)
    CORONA Pbulishing
Lectures and oral presentations  (2)：
  • Layout-Aware 2-Step Window-based Pattern Reordering for Fast Bridge/Open Test Generation
    (International Test Conference 2017)
  • Critical-Area-Aware Test Pattern Generation and Reordering
    (Asian Test Symposium 2016)
Works (1)：
  • 低価格テスタと連動したオンチップテスタのIP化に関する研究
    2001 - 2003
Education (2)：
  • 1977 - 1978 Osaka University Graduate School of Scientific Engineering
  • 1975 - 1976 Faculty of Scientific Engineering
Professional career (2)：
  • M.E. (Osaka University)
  • Ph. D. (Osaka University)
Work history (4)：
  • 2020 - 現在 Tokyo Metropolitan University
  • 1990 - 2020 Tokyo Metropolitan University Professor
  • 1990 - 1995 Chiba University Associate Professor
  • 1979 - 1989 Hitachi Central Research Laboratory Researcher
Committee career (6)：
  • 2012 - 2012 IEEE Pacific Rim International Symposium on Dependable Computing, General Chair
  • 2006 - 2007 IEICE Technical Committee on Dependable Compuitng, General Chair
  • 2006 - 2006 IEEE Workshop on RTL and High Level Test, General Chair
  • 2004 - 2005 IEEE International Test Conference, Asian Subcommittee Chair
  • 2001 - 2001 IEEE Workshop on RTL and High Level Test, Program Chair
Show all
Awards (2)：
  • 2002 - 武田計測先端知財団研究奨励賞優秀研究賞
  • 1985 - 電子通信学会論文賞
Association Membership(s) (6)：
IPSJ Member ,  IEICE Fellow ,  IEEE Senior Member ,  IEEE ,  情報処理学会 ,  電子情報通信学会
※ Researcher’s information displayed in J-GLOBAL is based on the information registered in researchmap. For details, see here.

Return to Previous Page

TOP

BOTTOM