Suzuki Daisuke

スズキダイスケ | Suzuki Daisuke

Affiliation and department：
Job title： Assistant Professor
Homepage URL (2)： http://db.tohoku.ac.jp/whois/detail/6994e18bcac9be6da0b4e01c948f0b4a.html , http://db.tohoku.ac.jp/whois/e_detail/6994e18bcac9be6da0b4e01c948f0b4a.html

Research field (2)： Information networks , Computer systems

Research theme for competitive and other funds (3)：

2020 - 2023 Optimization algorithm for nonvolatile FPGA and its CAD tool implementation
2017 - 2022 Spintronics-Based Hardware Paradigm for Artificial Intelligence
2013 - 2016 Design of a nonvolatile FPGA with system self-recovery function

Papers (75)：

Daisuke Suzuki, Takahiro Oka, Takahiro Hanyu. Design of an energy-efficient binarized convolutional neural network accelerator using a nonvolatile field-programmable gate array with only-once-write shifting. Japanese Journal of Applied Physics. 2021. 60
Daisuke Suzuki, Takahiro Hanyu. Design and Evaluation of a Synthesizable Standard-Cell-Based Nonvolatile FPGA. Proceedings of The International Symposium on Multiple-Valued Logic. 2020. 2020-. 194-199
Daisuke Suzuki, Takahiro Hanyu. Design of a cost-efficient controller for realizing a data-shift-minimized nonvolatile field-programmable gate array. Japanese Journal of Applied Physics. 2020. 59
SUZUKI Daisuke, TAKAHIRO Hanyu. Design of an Energy-Efficient Controller for Realizing a Data-Shift-Minimized Nonvolatile FPGA. International Conference on Solid-State Devices and Materials. 2019. 525-526
SUZUKI Daisuke, TAKAHIRO Hanyu. Design of a highly reliable, high-speed MTJ-based lookup table circuit using fractured logic-in-memory structure. Japanese Journal of Applied Physics. 2019. 58. SB. SBBB10~1-SBBB10~7

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MISC (9)：

Daisuke Suzuki, Takahiro Hanyu. Nonvolatile field-programmable gate array using a standard-cell-based design flow. IEICE Transactions on Information and Systems. 2021. E104D. 8. 1111-1120
Suzuki Daisuke, Hanyu Takahiro. C-12-34 A Self-Terminated MTJ Write Driver and Its Application to a Random Number Generator. Proceedings of the IEICE General Conference. 2016. 2016. 2. 107-107
Suzuki Daisuke, Tabata Yuki, Hanyu Takahiro. C-12-15 DESIGN OF A POWER MANAGEMENT MODULE FOR A LOGIC-IN-MEMORY-BASED NONVOLATILE FPGA. Proceedings of the IEICE General Conference. 2015. 2015. 2. 76-76
Hanyu Takahiro, Matsunaga Shoun, Suzuki Daisuke, Mochizuki Akira, Natsui Masanori. AT-1-3 Prospects of MTJ-Based Nonvolatile Logic-in-Memory VLSI. Proceedings of the IEICE General Conference. 2014. 2014. "SS-16"
SUZUKI Daisuke, NATSUI Masanori, MOCHIZUKI Akira, HANYU Takahiro. A Method for Optimizing Power-Efficiency of an MTJ-Based Nonvolatile FPGA. Technical report of IEICE. ICD. 2013. 113. 323. 49-53

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Books (1)：

Lectures and oral presentations (62)：

Design of an Energy-Efficient Controller for Realizing a Data-Shift-Minimized Nonvolatile FPGA
(2019 International Conference on Solid State Devices and Materials 2019)
Challenge of Energy-efficient AI Hardware Based on Nonvolatile Logic
(Symposium of Yotta Informatics - Research Platform for Yotta-Scale Data Science 2019 2019)
MTJ-Based Nonvolatile FPGA and Its Prospects for Brainware LSI Platform
(The 6th International Symposium on Brainware LSI 2019)
Challenge of Logic-Circuit Techniques for MTJ-Based Nonvolatile FPGAs
(2019)
Recent Trends in MTJ-Based Nonvolatile FPGA
(CSRN-Osaka Annual Workshop 2018)

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Education (1)：

Professional career (1)：

Awards (3)：

2018/06 - The 3rd 【ImPACT】 International Symposium on Spintronic Memory, Circuit and Storage 2017year Best Poster Award
2018/03 - 電気・情報系研究教授会平成29年度電気・情報系若手優秀研究賞
2010/05 - 電子情報通信学会電子情報通信学会エレクトロニクスソサイエティ論文賞

Association Membership(s) (3)：

IPSJ , IEICE , IEEE

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