Art

J-GLOBAL ID：200902155463862740   Reference number：96A0930000

Synthesis and Verification of Hardware Design. Satsuki: An Integrated Processor Synthesis and Compiler Generation System.

Satsuki 統合化プロセッサ合成・コンパイラ生成システム

Author (6)： SHACKLEFORD B (Hewlett-Packard Lab., CA, USA) ,  YASUDA M (Mitsubishi Electric Corp., Tokyo, JPN) ,  OKUSHI E (Mitsubishi Electric Corp., Tokyo, JPN) ,  KOIZUMI H (Mitsubishi Electric Corp., Tokyo, JPN) ,  TOMIYAMA H (Kyushu Univ., Kasugashi, JPN) ,  YASUURA H (Kyushu Univ., Kasugashi, JPN)
Material： IEICE Transactions on Information and Systems (Institute of Electronics, Information and Communication Engineers)  (IEICE Trans Inf Syst (Inst Electron Inf Commun Eng))
Volume： E79-D  Issue： 10  Page： 1373-1381  Publication year： Oct. 1996 
JST Material Number： L1371A  ISSN： 0916-8532  Document type： Article
Article type： 原著論文  Country of issue： Japan (JPN)  Language： ENGLISH (EN)

Thesaurus term： computer system development ,...

   To see more with JDream III (charged).   {{ this.onShowAbsJLink("http://jdream3.com/lp/jglobal/index.html?docNo=96A0930000&from=J-GLOBAL&jstjournalNo=L1371A") }}

JST classification (1)： Digital computer hardwares in general  (JC04010C)

Reference (16)：

• GUPTA, R. K. Hardware-software cosynthesis for digital systems. IEEE Design and Test of Computers. 1993, 10, 3, 29-41
• GUPTA, R. K. Program implementation schemes foe hardware-software systems. IEEE Computer. 1994, 27, 1, 48-55
• GAJSKI, D. D. Specification and design of embedded hardware-software systems. IEEE Design and Test of Computers. 1995, 12, 1, 53-67
• YASUURA, H. Hardware-software codesign with a soft-core processor. SASIMI '95. 1995, 79-84
• TOMIYAMA, H. Compiler generator for hardware/software codesign. Proc. 2nd Asia Pacific Conf. on Hardware Description Languages. 1994, 267-270

Terms in the title (4)： 統合化 ,  プロセッサ ,  コンパイラ ,  生成システム