Art
J-GLOBAL ID:200902164880049040   Reference number:00A0517864

Boundary Element Simulation of Electroplating on Silicon Wafer.

電気めっきの境界要素シミュレーション(LSI銅配線への応用)
Author (4):
Material:
Volume: 51  Issue:Page: 425-430  Publication year: Apr. 01, 2000 
JST Material Number: G0441B  ISSN: 0915-1869  CODEN: HYGIEX  Document type: Article
Article type: 原著論文  Country of issue: Japan (JPN)  Language: JAPANESE (JA)
Thesaurus term:
Thesaurus term/Semi thesaurus term
Keywords indexed to the article.
All keywords is available on JDreamIII(charged).
On J-GLOBAL, this item will be available after more than half a year after the record posted. In addtion, medical articles require to login to MyJ-GLOBAL.
,...
Semi thesaurus term:
Thesaurus term/Semi thesaurus term
Keywords indexed to the article.
All keywords is available on JDreamIII(charged).
On J-GLOBAL, this item will be available after more than half a year after the record posted. In addtion, medical articles require to login to MyJ-GLOBAL.

   To see more with JDream III (charged).   {{ this.onShowAbsJLink("http://jdream3.com/lp/jglobal/index.html?docNo=00A0517864&from=J-GLOBAL&jstjournalNo=G0441B") }}
JST classification (2):
JST classification
Category name(code) classified by JST.
Electroplating  ,  Manufacturing technology of solid-state devices 
Reference (6):
more...

Return to Previous Page