Art

J-GLOBAL ID：201002288836399796   Reference number：10A0612202

Analysis of Phase Noise Degradation Considering Switch Transistor Capacitances for CMOS Voltage Controlled Oscillators

CMOS電圧制御発振器に対するスイッチトランジスタ容量を考慮した位相雑音劣化の解析

Author (4)： MURAKAMI Rui (Tokyo Inst. of Technol., Tokyo, JPN) ,  HARA Shoichi (Tokyo Inst. of Technol., Tokyo, JPN) ,  OKADA Kenichi (Tokyo Inst. of Technol., Tokyo, JPN) ,  MATSUZAWA Akira (Tokyo Inst. of Technol., Tokyo, JPN)
Material： IEICE Transactions on Electronics (Institute of Electronics, Information and Communication Engineers)  (IEICE Trans Electron (Inst Electron Inf Commun Eng))
Volume： E93-C  Issue： 6  Page： 777-784  Publication year： Jun. 01, 2010 
JST Material Number： L1370A  ISSN： 0916-8524  Document type： Article
Article type： 原著論文  Country of issue： Japan (JPN)  Language： ENGLISH (EN)

Thesaurus term： transistor ,  switch ,  capacity ,  *phase noise ,  LC oscillator ,  oscillator ,  inductor ,  Q-value ,  *VCO ,  equivalent circuit ,  complementary metal oxide semiconductor ,  design optimisation ,  oscillation frequency ,  quality factor
Semi thesaurus term： switched-capacitor circuit ,  *parasitic capacitance ,  VCO

JST classification (1)： Oscillation circuits  (NC05020Y)

Reference (9)：

• [1] E. Hegazi, H. Sjoland, and A.A. Abidi, “A filtering technique to lower LC oscillator phase noise,” IEEE J. Solid-State Circuits, vol.36, no.12, pp.1921-1930, Dec. 2001.
• [2] C.W. Yao and A. Willson, “A phase-noise reduction technique for quadrature LC-VCO with phase-to-amplitude noise conversion,” IEEE International Solid-State Circuits Conference Digest of Technical Papers, pp.196-197, Feb. 2006.
• [3] A. Mazzanti and P. Andreani, “A 1.4mW 4.90-to-5.65GHz class-CMOS VCO with an average FoM of 194.5dBc/Hz,” IEEE International Solid-State Circuits Conference Digest of Technical Papers, pp.474-475, Feb. 2008.
• [4] Y. Wachi, T. Nagasaku, and H. Kondoh, “A 2.8GHz low-phase-noise CMOS VCO using an amplitude-redistribution technique,” IEEE International Solid-State Circuits Conference Digest of Technical Papers, pp.482-483, Feb. 2008.
• [5] S. Hara, T. Ito, K. Okada, and A. Matsuzawa, “Design space exploration of low-phase-noise LC-VCO using multiple-divide technique,” Proc. IEEE International Symposium on Circuits and Systems, pp.1966-1969, May 2008.

Terms in the title (5)： CMOS ,  電圧制御発振器 ,  トランジスタ ,  位相雑音 ,  解析