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J-GLOBAL ID:201502270143379031
Reference number:15A0337730
Linuxスケジューラによるリークモニタを用いた細粒度パワーゲーティング制御手法と実チップにおける評価
Author (11):
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Material:
Volume:
2014
Issue:
OS-129
Page:
VOL.2014-OS-129,NO.14 (WEB ONLY)
Publication year:
May. 07, 2014
JST Material Number:
U0451A
Document type:
Proceedings
Article type:
原著論文
Country of issue:
Japan (JPN)
Language:
JAPANESE (JA)
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Semi thesaurus term:
Thesaurus term/Semi thesaurus term
Keywords indexed to the article.
All keywords is available on JDreamIII(charged).
On J-GLOBAL, this item will be available after more than half a year after the record posted. In addtion, medical articles require to login to MyJ-GLOBAL.
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JST classification (1):
JST classification
Category name(code) classified by JST.
Digital computer hardwares in general
Reference (10):
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白井利明・香嶋俊裕・武田清大・中田光貴・宇佐美公良・長谷川揚平・関直臣・天野英晴著『ランタイムパワーゲーティングを適用したMIPS R3000プロセッサの実装設計と評価(低消費電力化技術)』芝浦工業大学・慶応義塾大学/情報処理学会研究報告,SLDM.[システムLSI設計技術]2008(2),43-48,2008-01-16.
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高橋弘明・小林弘明・坂本龍一・佐藤未来子・並木美太郎 著『Linuxにおける演算ユニットの電力特性を考慮した細粒度パワーゲーティング制御手法』構報処理学会研究報告.[システムソフトウェアとオペレーティング・システム]12022-OS-120(4),1-8,2012-02-21
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Yan Meng, Timothy Sherwood, Ryan Kastner. Exploring the limits of leakage power reduction in caches, ACM Transactions on Architecture and Code Optimization(TACO). Vol.2, Issue 3, pp. 221-246, September 2005.
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Stijn Eyerman and Lieven Eeckhout. Fine-grained dvfs using on-chip regulators. ACM Trans. Archit. Code Optim., Vol. 8, No. 1, pp. 1:1-1:24, February 2011.
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Gu-Yeon Wei, David Brooks, Ali Durlov Khan, and Xiaoyao Liang. Instruction-driven clock scheduling with glitch mitigation. In Proceedings of the 13th international symposium on Low power electronics and design, ISLPED '08, pp. 357-362, 2008.
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