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J-GLOBAL ID：201902241753277337
Reference number：19A2762592
コスト関数にニューラルネットワークを導入した論理素子配置アルゴリズムの検討
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Author (4)：
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Material：
Volume：
119
Issue：
208(RECONF2019 20-35)(Web)
Page：
13-18 (WEB ONLY)
Publication year：
Sep. 12, 2019
JST Material Number：
S0532B
ISSN：
0913-5685
Document type：
Proceedings
Article type：
原著論文
Country of issue：
Japan (JPN)
Language：
JAPANESE (JA)
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All keywords is available on JDreamIII(charged).
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Semi thesaurus term：
Thesaurus term/Semi thesaurus term
Keywords indexed to the article.
All keywords is available on JDreamIII(charged).
On J-GLOBAL, this item will be available after more than half a year after the record posted. In addtion, medical articles require to login to MyJ-GLOBAL.
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JST classification (2)：
JST classification
Category name(code) classified by JST.
Digital computer hardwares in general
, Artificial intelligence
Reference (7)：
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Y.L.Wu and M.Marek-Sadowska,“Orthogonal greedy coupling- a new optimization approach for 2-D field-programmable gate array,” Proc. ACM/IEEE Design Automation Conference(DAC), pp.568-573 (Jun. 1995).
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Y. W. Chang, D. F. Wong, and C. K. Wong, “Universal switch-module design for symmetric-array-based FPGAs,” ACM Trans. Design Automation of Electronic Systems, 1(1):80-101 (Jan. 1996).
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S. Wilton,“Architectures and Algorithms for Field-Programmable Gate Arrays with Embedded Memories,” PhD thesis, University of Toronto, Department of Electrical and Computer Engineering (1997).
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Masatoshi Nakamura, Masato Inagi, Kazuya Tanigawa, Tetsuo Hironaka, Masayuki Sato and Takashi Ishiguro, “APhysical Design Method for a New Memory-based Reconfigurable Architecture without Switch Blocks,” IEICE Transactions on Information and Systems, vol.E95-D, no.2,pp.324-334, (2012).
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Y. LeCun, L. Bottou, Y. Bendigo,”Gradient-based learning applied to documentrecognition,”Proc.IEEE, vol.86, no.11, pp.2278-2324, 1998.
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