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An on-chip load model for off-chip PDN analysis considering interdependency between supply voltage, current profile and clock latency
(2018 IEEE 22nd Workshop on Signal and Power Integrity, SPI 2018 - Proceedings 2018)
2019/10 - The 22nd Workshop on Synthesis And System Integration of Mixed Information technologies Outstanding paper award Efficiency investigation of capacitors mounted on re-distribution layers for FOWLP