Rchr
J-GLOBAL ID:200901006223135907
Update date: Dec. 18, 2024 Miura Katsuyoshi
ミウラ カツヨシ | Miura Katsuyoshi
Affiliation and department: Job title:
Associate Professor
Research field (2):
Electronic devices and equipment
, Intelligent informatics
Research keywords (3):
集積システム診断学
, Intelligent Informatics
, Election Devices and Apparatus Engineering
Research theme for competitive and other funds (4): - 知的画像処理に関する研究
- 集積回路のテスト
- Study on Intelligent Image Processing
- VLSI Testing
Papers (15): -
Koyo Suzuki, Katsuyoshi Miura, Koji Nakamae. Comparative study of NBTI/PBTI aging countermeasure method for Arbiter PUF circuit. Proceedings of the 38th NANO Testing Symposium (NANOTS 2018). 2018. 88-93
- Koyo Suzuki, Katsuyoshi Miura, Koji Nakamae. NBTI/PBTI tolerant arbiter PUF circuits. 2017 IEEE 23rd International Symposium on On-Line Testing and Robust System Design, IOLTS 2017. 2017. 80-84
-
Katsuyoshi. Miura, Yoshihiro. Midoh, Yasukazu. Murakami, Koji. Nakamae. Repair of discontinuous interference fringes in electron hologram by using the relaxation method. 2017
-
Katsuyoshi Miura, Yoshihiro Midoh, Yasukazu Murakami, Koji Nak. Repair of discontinuous interference fringes in electron holograpy by using the relaxation method. Proceedings of the 64th JSAP Spring Meeting. 2017. 14p-424-9
-
Atsuki Seko, Katsuyoshi Miura, Koji Nakamae. Emission image simulation considering variation of leakage-induced photon emission caused by threshold voltage variation. Proceeding of the 36th NANO Testing Symposium (NANOTS 2016). 2016. 167-172
more... MISC (50): -
Enhancement of Defect Tolerance in the QCA-based Programmable Logic Array (PLA). Nanotech Conference & Expo 2010, Anaheim, CA, USA. 2010. pp. 29- 32
- レーザテラヘルツエミッション顕微鏡のLSI 故障解析への応用. 2010
-
Enhancement of Defect Tolerance in the QCA-based Programmable Logic Array (PLA). Nanotech Conference & Expo 2010, Anaheim, CA, USA. 2010. pp. 29- 32
- Kiyoshi Nikawa, Shouji Inoue, Tatsuoki Nagaishi, Toru Matsumoto, Katsuyoshi Mura, Koji Nakamae. New Approach of Laser-SQUID Microscopy to LSI Failure Analysis. IEICE TRANSACTIONS ON ELECTRONICS. 2009. E92C. 3. 327-333
- LSI故障解析用LTEMプロトタイプ装置の開発. 2009
more... Works (6): -
超LSI故障個所解析装置ソフトウェアの開発
2010 -
-
高速・高精度な超LSI故障個所解析装置用診断支援手法の開発
2010 -
-
超LSI故障個所解析装置ソフトウェアの開発
2009 -
-
高速・高精度な超LSI故障個所解析装置用診断支援手法の開発
2009 -
-
超LSI故障個所解析装置
2009 -
more... Education (4): - - 1994 Osaka University
- - 1994 Osaka University Graduate School, Division of Engineering
- - 1992 Osaka University School of Engineering
- - 1992 Osaka University Faculty of Engineering
Professional career (2): - Master of Engineering (Osaka University)
- Ph.D. in Engineering (Osaka University)
Work history (4): - 2007 - - 大阪大学 准教授
- 2007 - Osaka University
- 2007 - - Associate Professor, Osaka University
- 2007 - Associate Professor, Osaka University
Committee career (2): - 2008 - LSIテスティング学会 事務局
- 2008 - The Institute of LSI Testing Secretariat
Awards (3): - 2007 - CADuser ML Best Contributor Award
- 2007 - CADuser ML Best Contributor Award
- 1998 - 1997年電子情報通信学会 総合大会 学術奨励賞
Association Membership(s) (4):
LSIテスティング学会
, IEEE
, 電子情報通信学会
, The Institute of LSI Testing
Return to Previous Page