Study on Modeling and Testing of Mixed-Signal Circuits
Study on IDDQ Testing(Current Testing)
Study on Design for Testability of LSIs
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Papers (35):
Yukiya Miura, Shingo Tsutsumi. A Method for Measuring Process Variations in the FPGA Chip Considering the Effect of Wire Delay. 27th IEEE International Symposium on On-Line Testing and Robust System Design(IOLTS). 2021. 1-6
Yukiya Miura, Tatsunori Ikeda. Aging Estimation ofMOS FETsUsingAging-Tolerant/Aged Ring Oscillators. IEEJ TRANSACTIONS ON ELECTRICAL AND ELECTRONIC ENGINEERING. 2020. 15. 10. 1475-1481
Takeshi Iwasaki, Masao Aso, Haruji Futami, Satoshi Matsunaga, Yousuke Miyake, Takaaki Kato, Seiji Kajihara, Yukiya Miura, Smith Lai, Gavin Hung, et al. Innovative Test Practices in Asia. 38th IEEE VLSI Test Symposium(VTS). 2020. 1-1
Yukiya Miura, Yuya Kinoshita. Soft Error Tolerance of Power-Supply-Noise Hardened Latches. 26th IEEE International Symposium on On-Line Testing and Robust System Design(IOLTS). 2020. 1-6
Yousuke Miyake, Takaaki Kato, Seiji Kajihara, Masao Aso, Haruji Futami, Satoshi Matsunaga, Yukiya Miura. On-Chip Delay Measurement for Degradation Detection And Its Evaluation under Accelerated Life Test. 2020 26TH IEEE INTERNATIONAL SYMPOSIUM ON ON-LINE TESTING AND ROBUST SYSTEM DESIGN (IOLTS 2020). 2020. 1-6