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J-GLOBAL ID：201001033156855264   Update date: May. 30, 2020

Yoshida Hiroaki

ヨシダ ヒロアキ | Yoshida Hiroaki
Affiliation and department：
The University of Tokyo VLSI (Very Scale Integration Large) Design and Education Center

About The University of Tokyo VLSI (Very Scale Integration Large) Design and Education Center


Homepage URL  (1)： http://www.cad.t.u-tokyo.ac.jp/~hiroaki/index-j.html
Research field  (1)： Electronic devices and equipment
Research keywords  (1)： 集積回路設計支援
Research theme for competitive and other funds  (4)：
  • 高位・論理設計の形式的検証技術
  • 論理回路の厳密最小化技術
  • トランジスタレベル最適化による論理回路の高性能化技術
  • 製造後変更可能性と高効率性を両立するハードウェアの設計技術
Papers (4)：
Patents (5)：
  • System and method for automated accurate pre-layout estimation of standard cell characteristics
  • Method, system and apparatus of IC design optimization via creation of design-specific cell from post-layout patterns
  • 回路検証装置、回路検証システム及び回路検証機能付LSI
  • Circuit verification device, circuit verification system and LSI with circuit verification function
  • アクセラレータ及びデータ処理方法
Books (1)：
  • システムLSI設計自動化技術の基礎
    培風館 2005 ISBN:4563067555
Education (2)：
  • 2000 - 2007 The University of Tokyo
  • 1996 - 2000 The University of Tokyo School of Engineering Dept. of Electronic Engineering
Professional career (1)：
  • 博士(工学) (東京大学)
Work history (2)：
  • 2008/04 - VLSI Design and Education Center, The University of Tokyo Project Assistant Professor
  • 2007/04 - 2008/03 VLSI Design and Education Center, The University of Tokyo Researcher
Awards (10)：
  • 2012/03 - IPSJ Yamashita SIG Research Award Rapid SoC Prototyping Based on Virtual Multi-Processor Model
  • 2011/10 - IEEE/ACM/IFIP CODES+ISSS Best Paper Candidate An Energy-Efficient Patchable Accelerator For Post-Silicon Engineering Changes
  • 2011/08 - IPSJ SIGSLDM Best Paper Award High-Level Synthesis for Highly-Efficient Accelerators Enabling Post-Silicon Engineering Change
  • 2010/11 - IPSJ Design Gaia 2010 Best Poster Award Rapid SoC Prototyping Based on Virtual Multi-Processor Model
  • 2010 - 情報処理学会 システムLSI設計技術研究会 優秀論文賞
Show all
Association Membership(s) (2)：
IEEE ,  情報処理学会
※ Researcher’s information displayed in J-GLOBAL is based on the information registered in researchmap. For details, see here.

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