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J-GLOBAL ID：200902243501009271
Reference number：06A1014977 A Structural Approach for Transistor Circuit Synthesis
トランジスタ回路合成のための構造的手法
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YOSHIDA Hiroaki
About YOSHIDA Hiroaki
(Univ. Tokyo, Tokyo, JPN)
, About Univ. Tokyo, Tokyo, JPN
IKEDA Makoto
About IKEDA Makoto
(Univ. Tokyo, Tokyo, JPN)
, About Univ. Tokyo, Tokyo, JPN
ASADA Kunihiro
About ASADA Kunihiro
(Univ. Tokyo, Tokyo, JPN)
About Univ. Tokyo, Tokyo, JPN
Material：
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences (Institute of Electronics, Information and Communication Engineers)
(IEICE Trans Fundam Electron Commun Comput Sci (Inst Electron Inf Commun Eng))
About IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences (Institute of Electronics, Information and Communication Engineers)
Volume： E89-A Issue： 12 Page： 3529-3537 Publication year： Dec. 01, 2006
JST Material Number： F0699C ISSN： 0916-8508 Document type： Article
Article type： 原著論文 Country of issue： Japan (JPN) Language： ENGLISH (EN)
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On J-GLOBAL, this item will be available after more than half a year after the record posted. In addtion, medical articles require to login to MyJ-GLOBAL.
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On J-GLOBAL, this item will be available after more than half a year after the record posted. In addtion, medical articles require to login to MyJ-GLOBAL.
*MOSFET
,...
About MOSFET
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All keywords is available on JDreamIII(charged).
On J-GLOBAL, this item will be available after more than half a year after the record posted. In addtion, medical articles require to login to MyJ-GLOBAL.
Keywords indexed to the article.
All keywords is available on JDreamIII(charged).
On J-GLOBAL, this item will be available after more than half a year after the record posted. In addtion, medical articles require to login to MyJ-GLOBAL.
computational complexity
About computational complexity
JST classification (2)：
JST classification
Category name(code) classified by JST.
Logic circuits
Category name(code) classified by JST.
(NC05070B)
, CAD,CAM
About Logic circuits
(JE10000A)
About CAD,CAM
Reference (17)：
- GURUSWAMY, M. CELLERITY : A fully automatic layout synthesis system for standard cell libraries. Proc. ACM/IEEE Design Automation Conf., June 1997. 1997, 327-332
- Synopsys, Inc. abraCAD Documentation. 2003
- PANDA, R. Migration : A new technique to improve synthesized designs through incremental customization. Proc. ACM/IEEE Design Automation Conf., June 1998. 1998, 388-391
- BHATTACHARYA, D. Design optimization with automated flex-cell creation. Closing the Gap between ASIC & Custom. 2002, 14-23
- NORTHROP, G. A. A semi-custom design flow in high-performance microprocessor design. Proc. ACM/IEEE Design Automation Conf., June 2001. 2001, 426-431
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トランジスタ
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回路合成
, About 回路合成
手法
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