Art

J-GLOBAL ID：200902243501009271   Reference number：06A1014977

A Structural Approach for Transistor Circuit Synthesis

トランジスタ回路合成のための構造的手法

Author (3)： YOSHIDA Hiroaki (Univ. Tokyo, Tokyo, JPN) ,  IKEDA Makoto (Univ. Tokyo, Tokyo, JPN) ,  ASADA Kunihiro (Univ. Tokyo, Tokyo, JPN)
Material： IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences (Institute of Electronics, Information and Communication Engineers)  (IEICE Trans Fundam Electron Commun Comput Sci (Inst Electron Inf Commun Eng))
Volume： E89-A  Issue： 12  Page： 3529-3537  Publication year： Dec. 01, 2006 
JST Material Number： F0699C  ISSN： 0916-8508  Document type： Article
Article type： 原著論文  Country of issue： Japan (JPN)  Language： ENGLISH (EN)

Thesaurus term： *MOSFET ,...
Semi thesaurus term： computational complexity

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JST classification (2)： Logic circuits  (NC05070B) ,  CAD,CAM  (JE10000A)

Reference (17)：

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• Synopsys, Inc. abraCAD Documentation. 2003
• PANDA, R. Migration : A new technique to improve synthesized designs through incremental customization. Proc. ACM/IEEE Design Automation Conf., June 1998. 1998, 388-391
• BHATTACHARYA, D. Design optimization with automated flex-cell creation. Closing the Gap between ASIC & Custom. 2002, 14-23
• NORTHROP, G. A. A semi-custom design flow in high-performance microprocessor design. Proc. ACM/IEEE Design Automation Conf., June 2001. 2001, 426-431

Terms in the title (3)： トランジスタ ,  回路合成 ,  手法