Rchr
J-GLOBAL ID：201001066678246433   Update date: Feb. 01, 2024

Miyoshi Takefumi

ミヨシ タケフミ | Miyoshi Takefumi
Affiliation and department：
e-trees.Japan, Inc.

About e-trees.Japan, Inc.


Other affiliations (1)：
  • WasaLabo, LLC.
Homepage URL  (1)： http://www.wasamon.net/miyo/
Research field  (3)： Information networks ,  Computer systems ,  Software
Research keywords  (10)： H/W・S/W協調設計 ,  リコンフィギュラブルシステム ,  自動並列化 ,  マルチプロセッサアーキテクチャ ,  最適化コンパイラ ,  HW/SW co-designing ,  Reconfigurable Processor ,  Automatic Parallelization ,  Multi-processr ,  Optimizing Compiler
Research theme for competitive and other funds  (9)：
  • 2010 - 2012 Network architecture and communication of a photonicnetwork-on-chip with fully utilizing inherent parallelism in applications
  • 2011 - 2011 論理回路中の疎な関係にある部分回路群の抽出と活用手法の研究
  • 2010 - メニーコアプロセッサのためのコンパイラ
  • 2010 - ストリーミングデータベース専用ハードウェアアーキテクチャの設計
  • 2010 - Compiler for Many-core Processor
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Papers (28)：
  • 光学応用へ向けたFPGA (field-programmable gate array)によるフィードバック制御-Feedback Control System with FPGA (Field-Programmable Gate Array) for Optics-フィードバック技術の進化と光学への新展開. 2021. 50. 5. 201-206
  • OKAMOTO Hiroyuki, MIYOSHI Takefumi, FUNADA Satoshi. Predicting of Trail Running Participant's Passing Time Based on Long Short-term Memory. Transactions of the Society of Instrument and Control Engineers. 2021. 57. 7. 334-336
  • Design and Implementation of Image Capturing System of a Lens Free Imager. 情報処理学会論文誌. 2017. 58. 8. 1348-1358
  • SUZUKI Ryota, TAKEMOTO Masashi, UMENO Katsuhiko, YASHIRO Masayuki, RYUCHI Tetsuya, STAHL Richard, VANMEERBEECK Geert, REUMERS Veerle, LAMBRECHTS Andy, ROELAND Huys, et al. Hardware Acceleration for High-performance Lens Free Imager. 2017. J100-D. 3. 331-340
  • Yuto Ishikawa, Keitaro Yanai, Keisuke Koike, Takefumi Miyoshi, Hironori Nakajo. Hardware Acceleration with Multi-Threading of Java-Based High Level Synthesis Tool. Proceedings of the 8th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies(HEART). 2017. 8-6
ｍore...
MISC (121)：
  • 三好 健文. ACRiルームの作り方と活用事例. 2021. 2021. 2-2
  • RFSoCを使った信号処理システム開発の一考察-VLSI設計技術. 2020. 119. 371. 159-163
  • RFSoCを用いた電子スピン量子ビット実験-VLSI設計技術. 2020. 119. 371. 165-167
  • Koide Takato, Kawai Yuta, Imawaka Hiroki, Niwase Ryohei, Miyoshi Takefumi, Negoro Makoto, Kagawa Akinori, Kitagawa Masahiro. Performance analysis of precise control of electron spin qubit using FPGA RFSoC. Meeting Abstracts of the Physical Society of Japan. 2020. 75.1. 658-658
  • 非整列ストリームデータ処理向けマルチコアプロセッサシステムの検討と評価-VLSI設計技術. 2019. 118. 430. 119-124
ｍore...
Books (1)：
  • Hello Worldから始めるFPGA入門 : 2大メーカXilinx, Alteraのお手軽ボードでチョコッと体験!
    CQ出版 2013
Education (2)：
  • - 2007 Tokyo Institute of Technology Interdisciplinary Science and Engineering Information Processing
  • - 2007 Tokyo Institute of Technology Graduate School, Division of Integrated Science and Engineering Dept. of Information Processing
Professional career (1)：
  • Engineering (Tokyo Institute of Technology)
Work history (8)：
  • 2014/07 - 現在 WasaLabo, LLC.
  • 2009 - 2010 Tokyo Institute of Technology Graduate School of Information Science and Engineering, Department of Computer Science
  • 2009 - 2010 Graduate School of Information Science and Engineering Tokyo Institute of Technology Post-doctor Researcher
  • 2010 - - 電気通信大学大学院情報システム学研究科情報ネットワークシステム学専攻 助教
  • 2010 - - The University of Electro-Communications Graduate School of Information Systems Department of Information Network Systems Laboratory for Network Computing Assist. Professor
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