WATANABE Nobuya

ワタナベノブヤ | WATANABE Nobuya

Affiliation and department：
Job title： Assistant Professor
Homepage URL (1)： https://www.rs.cs.okayama-u.ac.jp/

Research field (1)： Computer systems

Research keywords (8)：言語処理系 , ハードウェア設計自動化 , FPGA , Reconfigurable System , Computer Architecture , Hardware Design System , Parallel Processing , Programming Language System

Research theme for competitive and other funds (4)：

2023 - 2026 Development of hardware design system for high-speed dynamically reconfigurable devices
2011 - 2013 The research on the application description technique for dynamically reconfigurable system
2009 - 2011 The research on the processor with dynamically reconfigurable hardware
2001 - 2002 データ並列プログラミング言語のマルチスレッド拡張に関する研究

Papers (30)：

Yuki Shimamura, Minoru Watanabe, Nobuya Watanabe. Voltage Range Evaluation of An Optically Reconfigurable Gate Array VLSI. 2024 IEEE 35th International Conference on Application-specific Systems, Architectures and Processors (ASAP). 2024. 239-240
Nobuya Watanabe, Ryoya Ishitani, Minoru Watanabe. Application Design System for High-Speed Dynamically Reconfigurable Gate Arrays. IEEE 42nd International Conference on Consumer Electronics (ICCE 2024). 2024. 1480-1485
Utsuki Sekioka, Minoru Watanabe, Nobuya Watanabe. Remote Monitoring System for Optically Reconfigurable Gate Arrays Under Radiation Environments. IEEE 42nd International Conference on Consumer Electronics (ICCE 2024). 2024. 907-908
Sae Goto, Minoru Watanabe, Akifumi Ogiwara, Nobuya Watanabe. Parallel Configuration Experiment for a Radiation-Hardened Optically Reconfigurable Gate Array with a Holographic Polymer-Dispersed Liquid Crystal Memory. IEEE 42nd International Conference on Consumer Electronics (ICCE 2024). 2024. 905-906
Atsushi Takata, Minoru Watanabe, Nobuya Watanabe. Wafer Scale VLSI Realization Using Programmable Architecture. IEEE 42nd International Conference on Consumer Electronics (ICCE 2024). 2024. 205-206

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MISC (22)：

後藤彩絵, 渡邊実, 荻原昭文, 渡邊誠也. 液晶ホログラフィックメモリを持つ耐放射線光再構成型ゲートアレイへの並列構成試験. 電子情報通信学会リコンフィギャラブルシステム研究会技術研究報告. 2023. 123. 261. 209-214
高田睦士, 渡邊実, 渡邊誠也. 光再構成アーキテクチャを用いたウエハースケールVLSIの実現性. 電子情報通信学会リコンフィギャラブルシステム研究会技術研究報告. 2023. 123. 261. 205-208
今井颯真, 渡邊実, 渡邊誠也. MISCプロセッサの光再構成型ゲートアレイVLSIへの実装と最大動作周波数評価. 電子情報通信学会リコンフィギャラブルシステム研究会技術研究報告. 2023. 123. 261. 227-230
山田果歩, 渡邊実, 渡邊誠也. 光再構成型ゲートアレイVLSIのγ線による放射線劣化特性の評価. 第67回宇宙科学技術連合講演会講演集 JSASS-2023-40740. 2023
関岡空己, 渡邊実, 渡邊誠也. 光再構成型ゲートアレイの放射線試験向けモニタリングシステム. 電子情報通信学会リコンフィギャラブルシステム研究会技術研究報告. 2023. 123. 191. 1-5

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Lectures and oral presentations (94)：

Triple modular redundant RISC-V processor on a Cyclone V FPGA
(International Topical Workshop on Fukushima-Daiichi Decommissioning Research 2024 (FDR2024) 2024)
Triple modular redundant serial communication circuit used in a severe radiation environment
(International Topical Workshop on Fukushima-Daiichi Decommissioning Research 2024 (FDR2024) 2024)
Clock distribution exploiting switching matrices on an optically reconfigured gate array
(International Topical Workshop on Fukushima-Daiichi Decommissioning Research 2024 (FDR2024) 2024)
Implementation of a Mono Instruction Set Computer on a radiation-hardened optically reconfigurable gate array
(International Topical Workshop on Fukushima-Daiichi Decommissioning Research 2024 (FDR2024) 2024)
Optically reconfigured gate array VLSI with a triple-modular redundant optical configuration circuit
(International Topical Workshop on Fukushima-Daiichi Decommissioning Research 2024 (FDR2024) 2024)

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Education (3)：

1995 - 1998 Toyohashi University of Technology
1993 - 1995 Toyohashi University of Technology
1991 - 1993 Toyohashi University of Technology Faculty of Engineering Department of Information Computer Sciences

Professional career (1)：

Doctor (Eingineering) (Toyohashi University of Technology)

Work history (5)：

2023/04 - 現在 Okayama University Faculty of Environment, Life, Natural Science and Technology Assistant Professor
2021/04 - 2023/03 Okayama University Academic Field of Natural Science and Technology, Academic Research Assembly Assistant Professor
2007/04 - 2021/03 Okayama University Assistant Professor
2005/04 - 2007/03 Okayama University
1998/06 - 2005/03 Okayama University Faculty of Engineering

Committee career (9)：

2014 - 現在特定非営利活動法人パルテノン研究会運営委員
- 2022/12 The International Conference on Field-Programmable Technology (FPT'22) FPGA Design Competition Local Support Member
- 2022/09 第11回相磯秀夫杯FPGAデザインコンテスト(2022)実行委員会委員
- 2021/12 The International Conference on Field-Programmable Technology (FPT'21) FPGA Design Competition Local Support Member
- 2021/10 第10回相磯秀夫杯FPGAデザインコンテスト(2021) 委員

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Awards (8)：

2024/01 - IEEE CTSoc (Consumer Technology Society), The 2024 IEEE International Conference on Consumer Electronics (ICCE 2024) Best Session Presentation Award Parallel configuration experiment for a radiation-hardened optically reconfigurable gate array with a holographic polymer-dispersed liquid crystal memory
2023/03 - 岡山大学工学部社会貢献賞フィールドプログラマテクノロジー国際会議におけるFPGAデザインコンテスト開催への貢献
2023/03 - 情報処理学会第85回全国大会学生奨励賞脈流電源を用いた光再構成型ゲートアレイ
2022/03 - 岡山大学工学部教育貢献賞教育用計算機システムの充実に関する貢献
2022/01 - The IEEE 12th Annual Computing and Communication Workshop and Conference (CCWC) Best Paper Award Convolutional neural network implementation using Vitas AI

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Association Membership(s) (5)：

JAPAN SOCIETY FOR SOFTWARE SCIENCE AND TECHNOLOGY , INFORMATION PROCESSING SOCIETY OF JAPAN , THE INSTITUTE OF ELECTRONICS, INFORMATION AND COMMUNICATION ENGINEERS , IEEE , 特定非営利活動法人パルテノン研究会

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