Art

J-GLOBAL ID：200902235515724639   Reference number：05A0100559

Design Optimization of Active Shield Circuits for Digital Noise Suppression Based on Average Noise Evaluation

平均雑音評価によるディジタル雑音抑制のアクティブ・シールド回路の設計最適化

Author (4)： NICODIMUS R A (Tokyo Inst. of Technol., Tokyo, JPN) ,  SUZUKI H (Toyohashi Univ. Technol., Toyohashi-shi, JPN) ,  WADA K (Toyohashi Univ. Technol., Toyohashi-shi, JPN) ,  TAKAGI S (Tokyo Inst. of Technol., Tokyo, JPN)
Material： IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences (Institute of Electronics, Information and Communication Engineers)  (IEICE Trans Fundam Electron Commun Comput Sci (Inst Electron Inf Commun Eng))
Volume： E88-A  Issue： 2  Page： 444-450  Publication year： Feb. 01, 2005 
JST Material Number： F0699C  ISSN： 0916-8508  Document type： Article
Article type： 原著論文  Country of issue： Japan (JPN)  Language： ENGLISH (EN)

Thesaurus term： *digital integrated circuit ,...

   To see more with JDream III (charged).   {{ this.onShowAbsJLink("http://jdream3.com/lp/jglobal/index.html?docNo=05A0100559&from=J-GLOBAL&jstjournalNo=F0699C") }}

JST classification (1)： Semiconductor integrated circuit  (NC03162T)

Reference (10)：

• GHARPUREY, R. Modeling and analysis of substrate coupling in integrated circuits. Proc. IEEE Custom Integrated Circuits Conference, May 1995. 1995, 125-128
• SU, D. K. Experimental results and modeling techniques for substrate noise in mixed-signal integrated circuits. IEEE J. Solid-State Circuits. 1995, 28, 4, 420-430
• NAGATA, M. Substrate noise simulation techniques for analog-digital mixed LSI design. IEICE Trans. Fundamentals. 1999, E82-A, 2, 271-278
• FUKUDA, K. M. Substrate noise reduction using active guard band filters. VLSI Circuit Symp. Digest of Technical Papers, June 1995. 1995, 33-34
• LIU, T. Active substrate noise reduction method for ICs. Electron. Lett. 1999, 35, 19, 1633-1634

Terms in the title (7)： 平均 ,  雑音 ,  評価 ,  ディジタル ,  雑音抑制 ,  シールド ,  設計最適化