Rchr
J-GLOBAL ID:201001033156855264   Update date: May. 30, 2020

Yoshida Hiroaki

ヨシダ ヒロアキ | Yoshida Hiroaki
Affiliation and department:
Homepage URL  (1): http://www.cad.t.u-tokyo.ac.jp/~hiroaki/index-j.html
Research field  (1): Electronic devices and equipment
Papers (4):
Education (1):
  • 1996 - 2000 The University of Tokyo School of Engineering Dept. of Electronic Engineering
Work history (2):
  • 2008/04 - VLSI Design and Education Center, The University of Tokyo Project Assistant Professor
  • 2007/04 - 2008/03 VLSI Design and Education Center, The University of Tokyo Researcher
Awards (4):
  • 2012/03 - IPSJ Yamashita SIG Research Award Rapid SoC Prototyping Based on Virtual Multi-Processor Model
  • 2011/10 - IEEE/ACM/IFIP CODES+ISSS Best Paper Candidate An Energy-Efficient Patchable Accelerator For Post-Silicon Engineering Changes
  • 2011/08 - IPSJ SIGSLDM Best Paper Award High-Level Synthesis for Highly-Efficient Accelerators Enabling Post-Silicon Engineering Change
  • 2010/11 - IPSJ Design Gaia 2010 Best Poster Award Rapid SoC Prototyping Based on Virtual Multi-Processor Model
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