Art

J-GLOBAL ID：201002289571305693   Reference number：10A0874815

On Delay Test Quality for Test Cubes

テストキューブに対する遅延テスト品質について

Author (9)： OKU Shinji (Kyushu Inst. of Technol.) ,  KAJIHARA Seiji (Kyushu Inst. of Technol.) ,  KAJIHARA Seiji (JST, CREST) ,  SATO Yasuo (Kyushu Inst. of Technol.) ,  SATO Yasuo (JST, CREST) ,  MIYASE Kohei (Kyushu Inst. of Technol.) ,  MIYASE Kohei (JST, CREST) ,  WEN Xiaoqing (Kyushu Inst. of Technol.) ,  WEN Xiaoqing (JST, CREST)
Material： IPSJ Transactions on System LSI Design Methodology (Web)  (情報処理学会論文誌トランザクション System LSI Design Methodology(Web))
Volume： 3  Page： 283-291 (J-STAGE)  Publication year： 2010 
JST Material Number： U0110A  ISSN： 1882-6687  Document type： Article
Article type： 原著論文  Country of issue： Japan (JPN)  Language： ENGLISH (EN)

Thesaurus term： *failure ,  *circuit test ,  delay characteristic ,  quality ,  computer simulation ,  *electric fault ,  test pattern ,  length ,  logic circuit
Semi thesaurus term： *delay fault ,  fault simulation ,  *transition fault ,  deep sub-micron

JST classification (1)： Measurement,testing and reliability of solid-state devices  (NC03040G)

Reference (14)：

• 1) Cheng, K.-T., Dey, S., Rodgers, M. and Roy, K.: Test Challenges for Deep Sub-Micron Technologies, Design Automation Conf., pp.142-149 (June 2000).
• 2) Waicukauski, J.A., Lindbloom, E., Rosen, B.K. and Iyengar, V.S.: Transition fault simulation, IEEE Design & Test of Computers, pp.32-38 (April 1987).
• 3) Sato, Y., Hamada, S., Maeda, T., Takatori, A. and Kajihara, S.: Evaluation of the statistical delay quality model, ASP-DAC., pp.305-310 (2005).
• 4) Sato, Y., Hamada, S., Maeda, T., Takatori, A., Nozuyama, Y. and Kajihara, S.: Invisible delay quality - SDQM model lights up what could not be seen, Int. Test Conf., 47.1 (Nov. 2005).
• 5) Hamada, S., Maeda, T., Takatori, A., Noduyama, Y. and Sato, Y.: Recognition of sensitized longest paths in transition delay test, Int. Test Conf., Paper 11.1 (Oct. 2006).

Terms in the title (2)： テスト ,  遅延