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J-GLOBAL ID:201902261785612133   Reference number:19A0185300

Quality determination of logic element placement using deep learning in fine grain reconfigurable device MPLD

細粒度再構成可能デバイスMPLDにおけるディープラーニングを用いた論理素子配置の良し悪し判定
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Volume: 118  Issue: 334(VLD2018 40-71)  Page: 71-76  Publication year: Nov. 28, 2018 
JST Material Number: S0532B  ISSN: 0913-5685  Document type: Proceedings
Article type: 原著論文  Country of issue: Japan (JPN)  Language: JAPANESE (JA)
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Logic circuits  ,  General  ,  Artificial intelligence 
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