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J-GLOBAL ID:202002269034888220   Reference number:20A2738823

Complete Double Node Upset Tolerant Latch Using C-Element

C素子を用いた完全二重ノードアップセット耐性ラッチ
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Volume: E103.D  Issue: 10  Page: 2125-2132(J-STAGE)  Publication year: 2020 
JST Material Number: U0469A  ISSN: 1745-1361  Document type: Article
Article type: 原著論文  Country of issue: Japan (JPN)  Language: ENGLISH (EN)
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Semiconductor integrated circuit  ,  Other electronic circuits 
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