S. Venkataraman and S. B. Drummonds, “A technique for logic fault diagnosis of interconnect open defects,” Proc. VLSI Test Sympo., pp. 313-318, 2000.
S.-Y. Huang, “Speeding up the byzantine fault diagnosis using symbolic simulation,” Proc. VLSI Test Sympo., pp. 193-198, 2002.
S.-Y. Huang, “Diagnosis of byza. ntine open-segment faults,” Proc. Asian Test Sympo., pp. 248-253, 2002.
S.-Y. Huang, “Symbolic inject-and-evaluation paradigm for byzantine fault diagnosis,” J. Electronic Testing: Theory and Applications, vol.19, no.2, pp. 161-172, 2003.