Pipelined architecture of high-speed RSA encryption processor using redundant binary arithmetic and table-look-up. Proceedings of 2004 IEEE International Conference on Electrical and Computer Engineering. 2004. Vol. 3, pp.593-595
Reconfigurable architecture of high-speed RSA encryption processor with built-in table for residue calculation of redundant binary numbers. Proceedings of 2004 IEEE International Conference on High Performance Computing. 2004
Design of a search processor for competitively traveling robots 共著. Proc. of 2004 IEEE Mediterranean Conference on Control and Automation. 2004. MoM1-A-5
Design of a search processor for competition-type intelligent robots 共著. Proc. of 2004 IEEE International Conference on Mechatronics. 2004. T4A-2