Art

J-GLOBAL ID：200902119971035934   Reference number：02A0119430

CMOS Charge Pumps Using Cross-Coupled Charge Transfer Switches with Improved Voltage Pumping Gain and Low Gate-Oxide Stress for Low-Voltage Memory Circuits.

低電圧メモリ回路用の電圧ポンプ利得向上とゲート酸化物の低応力化を図ったCMOSチャージポンプ

Author (2)： MIN K-S (Hynix Semiconductor Inc., Chenongju-si, KOR) ,  AHN J-H (Hynix Semiconductor Inc., Chenongju-si, KOR)
Material： IEICE Transactions on Electronics (Institute of Electronics, Information and Communication Engineers)  (IEICE Trans Electron (Inst Electron Inf Commun Eng))
Volume： E85-C  Issue： 1  Page： 225-229  Publication year： Jan. 01, 2002 
JST Material Number： L1370A  ISSN： 0916-8524  Document type： Article
Article type： 短報  Country of issue： Japan (JPN)  Language： ENGLISH (EN)

Thesaurus term： CMOS structure ,...
Semi thesaurus term： チャージポンプ

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JST classification (1)： Power source circuit  (NC05060Q)

Reference (6)：

• WEE, J. -K. An antifuse EPROM circuitry scheme for field-programmable repair in DRAM. IEEE J. Solid-State Circuits. 2000, 35, 10, 1408-1414
• DICKSON, J. On-chip high-voltage generation in MNOS integrated circuits using an improved voltage multiplier technique. IEEE J. Solid-State Circuits. 1976, 11, 3, 374-378
• CHOI, K. -H. Floating-well charge pump circuits for sub-2.0 V single power supply flash memories. Symposium on VLSI circuits Digest of Technical Papers. 1997, 61-62
• WU, J. -T. MOS charge pumps for low-voltage operation. IEEE J. Solid-State Circuits. 1998, 33, 4, 592-597
• FAVRAT, P. A high-efficiency CMOS voltage doubler. IEEE J. Solid-State Circuits. 1998, 33, 3, 410-416

Terms in the title (7)： 低電圧 ,  メモリ回路 ,  利得 ,  ゲート酸化物 ,  応力 ,  CMOS ,  チャージポンプ