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J-GLOBAL ID:200902167210034564   Reference number:01A0700095

Analysis and Improvement of Retention Time of Memorized State of Metal-Ferroelectric-Insulator-Semiconductor Structure for Ferroelectric Gate FET Memory.

強誘電体ゲートFETメモリのための金属-強誘電体-絶縁体-半導体構造の記憶状態の保持時間の解析と改善
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Volume: 40  Issue: 4B  Page: 2923-2927  Publication year: Apr. 30, 2001 
JST Material Number: G0520B  ISSN: 0021-4922  Document type: Article
Article type: 原著論文  Country of issue: Japan (JPN)  Language: ENGLISH (EN)
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Semiconductor integrated circuit 
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