Advanced search: Search from
Select basic information for advanced search
| Free word |
|---|
Rchr
J-GLOBAL ID：201601001313740323
Update date: Nov. 13, 2024 Hara Yuko
ハラ ユウコ | Hara Yuko
Institute of Science Tokyo School of Engineering
About Institute of Science Tokyo School of Engineering
Job title： Associate Professor
Research theme for competitive and other funds (17)：
- 2023 - 2028 Trustworthy IoTシステム設計基盤の構築
- 2020 - 2025 Fundamental Technologies of Efficient Analysis and Design for Approximate Computing-based Embedded Systems
- 2021 - 2024 情報鮮度 AoI に関する基礎理論の確立と多様な情報通信システムへの応用
- 2020 - 2024 スケーラブルな物理セキュリティを可能にする近似計算の設計基盤と理論の構築
- 2022 - 2024 IoTエッジ向け組込みハードウェア/ソフトウェアのセキュア設計
Show all
- Maki TSUKAHARA, Yusaku HARADA, Haruka HIRATA, Daiki MIYAHARA, Yang LI, Yuko HARA-AZUMI, Kazuo SAKIYAMA. Practical Randomness Effects on Physical Security in Second-Order Threshold Implementation of AES. IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences. 2024
- Saya Inagaki, Mingyu Yang, Yang Li, Kazuo Sakiyama, Yuko Hara-Azumi. Power Side-channel Attack Resistant Circuit Designs of ARX Ciphers Using High-level Synthesis. ACM Transactions on Embedded Computing Systems. 2023. 22. 5. 1-17
- Saya Inagaki, Mingyu Yang, Yang Li, Kazuo Sakiyama, Yuko Hara-Azumi. Power Side-channel Countermeasures for ARX Ciphers using High-level Synthesis. Proceedings of the 2023 ACM/SIGDA International Symposium on Field Programmable Gate Arrays. 2023
- Maki Tsukahara, Haruka Hirata, Mingyu Yang, Daiki Miyahara, Yang Li, Yuko Hara-Azumi, Kazuo Sakiyama. On the Practical Dependency of Fresh Randomness in AES S-box with Second-Order TI. CANDARW. 2023. 286-291
- Keigo Matsumoto, Yoshiaki Inoue, Yuko Hara-Azumi, Kazuki Maruta, Yu Nakayama, Daisuke Hisano. Impact of Quantization Noise on CNN-based Joint Source-Channel Coding and Modulation. Proceedings - IEEE Consumer Communications and Networking Conference, CCNC. 2023. 2023-January. 465-468
- 春日井 貴通, 山下 茂, 原 祐子. Partially-Programmable Circuitを用いた遅延故障の回避手法 (ディペンダブルコンピューティング) -- (組込み技術とネットワークに関するワークショップETNET2016). 電子情報通信学会技術研究報告 = IEICE technical report : 信学技報. 2016. 115. 519. 145-150
- Yuko Hara, Hiroyuki Tomiyama, Shinya Honda, Hiroaki Takada. Proposal and Quantitative Analysis of the CHStone Benchmark Program Suite for Practical C-based High-level Synthesis. 2009. 50. 10. 2471-2483
- Embedded System Covalidation with RTOS Model and FPGA (IPSJ Transactions on System LSI Design Methodology Vol.1). 2008. 2008. 1. 126-130
- HARA Yuko, TOMIYAMA Hiroyuki, HONDA Shinya, TAKADA Hiroaki, ISHII Katsuya. Partitioning Behavioral Descriptions Exploiting Function-Level Parallelism. 2008. 2008. 32. 37-42
- HARA Yuko, TOMIYAMA Hiroyuki, HONDA Shinya, TAKADA Hiroaki, ISHII Katsuya. Partitioning Behavioral Descriptions Exploiting Function-Level Parallelism. IEICE technical report. 2008. 107. 559. 37-42
※ Researcher’s information displayed in J-GLOBAL is based on the information registered in researchmap. For details, see here.
Return to Previous Page
