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長田康敬. Efficient Model Checking of Asynchronous Systems Exploiting Temporal Order-Based Reduction Method. Proc. Int'l Tech. Conf. on Circuit/Systems, Computers and Communications. 2002. II. 1964-1967
長田康敬. On Asynchronous Dataflow Computer. Proc. The Second Korea-Japan Joint Symp. on Multiple-Valued Logic, JS-MVL2001. 2001
長田康敬. Efficient Verification of Asynchronous Circuits Exploiting Temporal Order-Based Reduced-STG. Proc. Int'l Tech. Conf. on Circuit/Systems, Computers and Communications. 2001. II. 965-968