Art

J-GLOBAL ID：200902295164410589   Reference number：08A0224655

Post-BIST Fault Diagnosis for Multiple Faults

多重故障に関するBIST後の故障診断

Author (7)： TAKAHASHI Hiroshi (Ehime Univ., Matsuyama-shi, JPN) ,  HIGAMI Yoshinobu (Ehime Univ., Matsuyama-shi, JPN) ,  KADOYAMA Shuhei (Ehime Univ., Matsuyama-shi, JPN) ,  TAKAMATSU Yuzo (Ehime Univ., Matsuyama-shi, JPN) ,  YAMAZAKI Koji (Meiji Univ., Tokyo, JPN) ,  AIKYO Takashi (Semiconductor Technol. Academic Res. Center (STARC), Yokohama-shi, JPN) ,  SATO Yasuo (Semiconductor Technol. Academic Res. Center (STARC), Yokohama-shi, JPN)
Material： IEICE Transactions on Information and Systems (Institute of Electronics, Information and Communication Engineers)  (IEICE Trans Inf Syst (Inst Electron Inf Commun Eng))
Volume： E91-D  Issue： 3  Page： 771-775  Publication year： Mar. 01, 2008 
JST Material Number： L1371A  ISSN： 0916-8532  Document type： Article
Article type： 原著論文  Country of issue： Japan (JPN)  Language： ENGLISH (EN)

Thesaurus term： *built-in self-test ,  hardware testing ,  *stuck-fault ,  LSI ,  algorithm ,  fault diagnosis ,  circuit test ,  integrated circuit ,  combinational circuit

JST classification (1)： Digital computer hardwares in general  (JC04010C)

Reference (6)：

• TAKAHASHI, H. BIST based diagnosis using ambiguous test set. Proc. 18th Int. Symp. Defect and Fault Tolerance in VLSI Systems, Oct. 2003. 2003, 89-96
• TAKAHASHI, H. Effective post-BIST fault diagnosis for multiple faults. Proc. 21st Int. Symp. Defect and Fault Tolerance in VLSI Systems, Oct. 2006. 2006, 401-409
• DASTIDAR, J. G. Fault diagnosis in scan-based BIST using both time and space information. Proc. Int. Test Conf., Sept. 1999. 1999, 95-102
• WEN, X. On per-test fault diagnosis using the X-fault model. Proc. Int. Conf. on Computer-Aided Design, Nov. 2004. 2004, 633-640
• SATO, Y. Invisible delay quality-SDQM model lights up what could not be seen. Proc. Int. Test Conf, Oct. 2005. 2005

Terms in the title (4)： 多重 ,  故障 ,  BIST ,  故障診断